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PI6C2408 - 3.3V 4+4 Ouptut Zero-delay Clock Driver

General Description

The PI6C2408 is a PLL-based, zero-delay buffer, with the ability to distribute eight outputs of up to 140MHz at 3.3V.

Key Features

  • ÎÎMaximum rated frequency: 140 MHz ÎÎLow cycle-to-cycle jitter ÎÎInput to output delay, less than 150ps ÎÎExternal feedback pin allows outputs to be synchronized to the clock input ÎÎ5V tolerant CLKIN input ÎÎOperates at 3.3V VDD ÎÎTest mode allows bypass of the PLL for system testing purposes (e. g. , IBIS measurements) ÎÎClock frequency multipliers ½x to 4x dependent on option ÎÎPackaging (Pb-free and Green available): àà 16-pin, 150-mil SOIC (W) àà 16-pin 173-mil TSSOP (L).

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PI6C2408 3.3V 4+4 Ouptut Zero-delay Clock Driver Features ÎÎMaximum rated frequency: 140 MHz ÎÎLow cycle-to-cycle jitter ÎÎInput to output delay, less than 150ps ÎÎExternal feedback pin allows outputs to be synchronized to the clock input ÎÎ5V tolerant CLKIN input ÎÎOperates at 3.3V VDD ÎÎTest mode allows bypass of the PLL for system testing purposes (e.g., IBIS measurements) ÎÎClock frequency multipliers ½x to 4x dependent on option ÎÎPackaging (Pb-free and Green available): àà 16-pin, 150-mil SOIC (W) àà 16-pin 173-mil TSSOP (L) Description The PI6C2408 is a PLL-based, zero-delay buffer, with the ability to distribute eight outputs of up to 140MHz at 3.3V.