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PI6C2409 - Zero-Delay Clock Buffer

General Description

The PI6C2409 is a PLL based, zero-delay buffer, with the ability to distribute nine outputs of up to 133MHz at 3.3V.

All the outputs are distributed from a single clock input CLKIN and output OUT0 performs zero delay by connecting a feedback to PLL.

Key Features

  • Maximum rated frequency: 133 MHz Low cycle-to-cycle jitter Input to output delay, less than 200ps Internal feedback allows outputs to be synchronized to the clock input.
  • Operates at 3.3V VDD.
  • Space-saving Packages: 150-mil SOIC (W) 173-mil TSSOP (L) Functional.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI6C2409 Zero-Delay Clock Buffer Product Features • • • • Maximum rated frequency: 133 MHz Low cycle-to-cycle jitter Input to output delay, less than 200ps Internal feedback allows outputs to be synchronized to the clock input • Operates at 3.3V VDD • Space-saving Packages: 150-mil SOIC (W) 173-mil TSSOP (L) Functional Description The PI6C2409 is a PLL based, zero-delay buffer, with the ability to distribute nine outputs of up to 133MHz at 3.3V.