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PI6C2516 - Phase-Locked Loop Clock Driver with 16 Clock Outputs

General Description

The PI6C2516 family is a low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high-frequency clock signals for SDRAM, server and networking applications.

Key Features

  • • High Performance Phase-Locked Loop Clock Distribution for Synchronous DRAM, server and networking.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI6C2516 Phase-Locked Loop Clock Driver with 16 Clock Outputs Product Features • High Performance Phase-Locked Loop Clock Distribution for Synchronous DRAM, server and networking applications. • Zero Input-to-Output delay: Distribute One Clock Input to four banks of four outputs, with separate output enables for each bank. • Allow Clock Input to have Spread Spectrum modulation for EMI reduction. The clock outputs track the Clock Input modulation. • Maximum clock frequency of 150 MHz.