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PI90LVB048A - LVDS Quad Flow-Through Differential Line Receivers

This page provides the datasheet information for the PI90LVB048A, a member of the PI90LV048A LVDS Quad Flow-Through Differential Line Receivers family.

Datasheet Summary

Description

The PI90LV048A/PI90LVT048A quad flow-through differential line receivers are designed for applications requiring ultra low-power dissipation and high data rates.

The device is designed to support data rates in excess of 500 Mbps (250 MHz) using Low Voltage Differential Signaling (LVDS) technology.

Features

  • 500 Mbps (250 MHz) switching rates Flow-through pinout simplifies PCB layout 150ps channel-to-channel skew (typical) 100ps differential skew (typical) 2.7ns maximum propagation delay 3.3V power supply design High impedance LVDS inputs on power down Low Power design (40mW, 3.3V static) Wide common-mode input voltage range: 0.2V to 2.7V Accepts small.

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Datasheet preview – PI90LVB048A

Datasheet Details

Part number PI90LVB048A
Manufacturer Pericom Semiconductor
File Size 179.83 KB
Description LVDS Quad Flow-Through Differential Line Receivers
Datasheet download datasheet PI90LVB048A Datasheet
Additional preview pages of the PI90LVB048A datasheet.

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www.DataSheet4U.com 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI90LV048A/PI90LVT048A 3V LVDS Quad Flow-Through Differential Line Receivers Features • • • • • • • • • • • • • • • 500 Mbps (250 MHz) switching rates Flow-through pinout simplifies PCB layout 150ps channel-to-channel skew (typical) 100ps differential skew (typical) 2.7ns maximum propagation delay 3.3V power supply design High impedance LVDS inputs on power down Low Power design (40mW, 3.3V static) Wide common-mode input voltage range: 0.2V to 2.
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