Datasheet4U Logo Datasheet4U.com

74F259 - Latch

General Description

The 74F259 addressable latch has four distinct modes of operation which are selectable by controlling the Master Reset (MR) and Enable (E) inputs (see Function Table).

In the addressable latch mode, data at the Data inputs is written into the addressed latches.

Key Features

  • Combines demultiplexer and 8-bit latch.
  • Serial-to-parallel capability.
  • Output from each storage bit available.
  • Random (addressable) data entry.
  • Easily expandable.
  • Common reset input.
  • Useful as 1-of-8 active-High decoder.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
74F251A 8-Input Multiplexer National Semiconductor
74F251A 8-Input Multiplexer Fairchild
74F253 Dual 1-of-4 Data Selector/Multiplexers Texas Instruments
74F253 Dual 4-Input Multiplexer Fairchild
74F253 Dual 4-Input Multiplexer National

Other Datasheets by Philips Semiconductors (now NXP Semiconductors)

Part Number Description
74F251A 8-input multiplexer
74F253 Dual 4-bit multiplexer
74F256 Dual addressable latch
74F257A Quad 2-lnput selector/multiplexer
74F258A 2-input selector/multiplexer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
INTEGRATED CIRCUITS 74F259 Latch Product specification IC15 Data Handbook 1989 Apr 11 Philips Semiconductors Philips Semiconductors Product specification Latch 74F259 FEATURES • Combines demultiplexer and 8-bit latch • Serial-to-parallel capability • Output from each storage bit available • Random (addressable) data entry • Easily expandable • Common reset input • Useful as 1-of-8 active-High decoder DESCRIPTION The 74F259 addressable latch has four distinct modes of operation which are selectable by controlling the Master Reset (MR) and Enable (E) inputs (see Function Table). In the addressable latch mode, data at the Data inputs is written into the addressed latches. The addressed latches will follow the Data input with all unaddressed latches remaining in their previous states.