74F298 Datasheet | Philips Semiconductors

FEATURES - Fully synchronous operation - Select from two data sources - Buffered, negative edge triggered clock - Provides the equivalent of function capabilities of two separate MSI functions (74F157 and 74F175) PIN CONFIGURATION I1b I1a I0a I0b I1c 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Qa Qb Qc Qd CP S I0c DESCRIPTION The 74F298 is a high speed Quad 2-Input Multiplexer with storage. It selects 4 bits of data from two sources (ports) under the control of a mon Select input (S). The selected data is transferred to the 4-bit output register synchronous with the High-to-Low transition of the clock (CP). The 4-bit register is fully edge triggered. The data inputs (I0 and I1) and Select input (S) must be stable only one setup time prior to the High-to-Low transition of the clock for predictable operation. TYPE 74F298 I1d I0d GND SF00859 TYPICAL f MAX 115MHz TYPICAL SUPPLY CURRENT (TOTAL) 30m A ORDERING INFORMATION ORDER CODE DESCRIPTION MERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F298N N74F298D PKG DWG # 16-pin plastic DIP 16-pin plastic SO SOT38-4 SOT109-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS I0a, I0b, I0c, I0d I1a, I1b, I1c, I1d S CP Qa, Qb, Qc, Qd DESCRIPTION Data inputs Data inputs Select input Clock input (active falling edge) Data outputs 74F (U.L.) HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 50/33 LOAD VALUE HIGH/LOW 20µA/0.6m A 20µA/0.6m A 20µA/0.6m A 20µA/0.6m A 1.0m A/20m A NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6m A in the Low state. LOGIC SYMBOL 3 2 4 1 9 5 7 6 LOGIC SYMBOL (IEEE/IEC) 11 10 C1 M2 3 I0a I1a I0b 10 11 S CP Qa Qb Qc Qd I1b I0c I1c I0d I1d 2 4 1 9 2, 1D 2, 1D 13 5 7 12 VCC = Pin 16 GND = Pin 8 SF00860 SF00861...