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74HC112 - Dual JK flip-flop

General Description

The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard no.

7A.

Key Features

  • Asynchronous set and reset.
  • Output capability: standard.
  • ICC category: flip-flops.

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📁 Similar Datasheet

Part Number Description Manufacturer
74HC112 Dual J-K Negative-Edge-Triggered Flip-Flops Texas Instruments
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74HC11 Triple 3-Input AND Gate Texas Instruments
74HC11 Triple 3-input AND gate NXP

Other Datasheets by Philips Semiconductors (now NXP Semiconductors)

Part Number Description
74HC11 Triple 3-input AND gate
74HC10 Triple 3-input NAND gate
74HC107 Dual JK flip-flop
74HC109 Dual JK flip-flop
74HC123 Dual retriggerable monostable multivibrator

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT112 Dual JK flip-flop with set and reset; negative-edge trigger Product specification Supersedes data of December 1990 File under Integrated Circuits, IC06 1998 Jun 10 Philips Semiconductors Product specification Dual JK flip-flop with set and reset; negative-edge trigger FEATURES • Asynchronous set and reset • Output capability: standard • ICC category: flip-flops GENERAL DESCRIPTION The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).