SAA4990H Datasheet | Philips Semiconductors

FEATURES - Adaptive data slicer - Crystal-controlled data clock regeneration with a bit rate of 6.9375 MHz - Adaptive sync separator, horizontal phase detector and 13.5 MHz VCO to provide display phase locked loop (PLL) - TV synchronization at teletext mode GENERAL DESCRIPTION The SAA5191 is a bipolar integrated circuit that extracts teletext data from the video signal (CVBS), regenerates the teletext clock (TTC) and synchronizes the text display to the television signals (VCS). This device operates in conjunction with the Digital Video Teletext (back-end) Decoder (DVTB - SAA9042A) or any other patible device. QUICK REFERENCE DATA SYMBOL VP IP Vi CVBS supply current CVBS input signal on pin 27 (peak-to-peak value) at pin 2 LOW at pin 2 open-circuit Vo VF13 VSYNC VCS outputs signals TTC and TTD (peak-to-peak value, pins 14, 15) 13.5 MHz clock output signal (peak-to-peak value pin 17) SYNC output signal TCS video posite sync level on output pin 25 LOW HIGH Tamb operating ambient temperature - 2.4 0 - - - 0.4 5.5 +70 V V °C - - 2.5 1 1 2.5 3.5 2 - 450 - - 4.5 3 1 650 V V V V V m V PARAMETER supply voltage (pin 16) - - MIN. TYP. 12 70 - - MAX. V m A UNIT video sync output signal (peak-to-peak value, pin 1) - 200 ORDERING AND PACKAGE INFORMATION EXTENDED TYPE NUMBER SAA5191 Note 1. SOT117-1;1996 November 14 28 PACKAGE PINS DIL PIN POSITION MATERIAL plastic CODE SOT117(1) March 1991 March 1991 handbook, full pagewidth VP PL CBB VP +12 V 21 19 17 F13 (13.5 MHz clock) 20 18 16 Philips Semiconductors TCS PULSE GENERATOR VCO Teletext video processor 28 HORIZONTAL PHASE DETECTOR SENSE "NO INPUT" SAA5191 LATCHES ADAPTIVE DATA SLICER TTD (data) posite video input DUAL POLARITY BUFFER CLOCK PHASE DETECTOR ADAPTIVE SYNC SEPARATOR 26 SENSE "NO LOAD" SENSE EXTERNAL DATA TTC (clock) HF LOSS PENSATOR 3 4 1 5 6 8 7 9 VP set sync polarity data...