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PHY6212 - Bluetooth LE 5.2 SOC

General Description

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Added “Power consumption” in the home page 2.

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Key Features

  • ARM® Cortex™-M0 32-bit processor.
  • Memory.
  • 512KB/2MB in-system flash memory.
  • 128KB ROM.
  • 138KB SRAM, all programmable retention in sleep mode.
  • 8-channel DMA.
  • 33/19 general purpose I/O pins.
  • All pins can be configured as serial interface and programmable IO MUX function mapping.
  • All pins can be configured for wake-up.
  • 18 pins for triggering interrupt.
  • 3 quadrature decoder(QDEC).
  • 6-channel PWM.
  • 4-channel I2S.
  • 2-channe.

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Datasheet Details

Part number PHY6212
Manufacturer Phyplus
File Size 1.77 MB
Description Bluetooth LE 5.2 SOC
Datasheet download datasheet PHY6212 Datasheet

Other Datasheets by Phyplus

Part Number Description
PHY6202 Bluetooth Low Energy SOC
PHY6222 Bluetooth LE 5.2 SOC
PHY6252 Bluetooth 5.2 SOC

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PHY6212 Bluetooth LE 5.2 System on Chip Key Features • ARM® Cortex™-M0 32-bit processor • Memory  512KB/2MB in-system flash memory  128KB ROM  138KB SRAM, all programmable retention in sleep mode  8-channel DMA • 33/19 general purpose I/O pins  All pins can be configured as serial interface and programmable IO MUX function mapping  All pins can be configured for wake-up  18 pins for triggering interrupt  3 quadrature decoder(QDEC)  6-channel PWM  4-channel I2S  2-channel PDM  2-channel I2C  2-channel SPI  1-channel UART  JTAG • DMIC/AMIC with microphone bias • 3/8-channel 12bit ADC with low noise voice PGA • 4-channel 24bit timer, one watchdog timer • Real timer counter (RTC) • Power, clock, reset controller • Flexible power management  Supply voltage range 1.8V to 3.