Datasheet4U Logo Datasheet4U.com

9QXL2001B - PCIe Clock Buffer

Description

The 9QXL2001B is a 20-output very-low-additive phase jitter fanout buffer for PCIe Gen4, Gen5 and UPI applications.

The 9QXL2001B provides two methods to control output enables; standard OE# pins and SMBus enable bits, or a simple 3-wire serial interface that is independent of the SMBus.

Features

  • Two Output Enable Control modes:.
  • Traditional 8 OE# pins allow hardware control of 8 outputs and 20 SMBus bits allow software control of each output.
  • Simple 3-wire Side-Band Interface allows real-time control of all 20 outputs.
  • Outputs remain Low/Low when powered up with floating input clock.
  • Low-Power HCSL (LP-HCSL) outputs:.
  • Zo = 85Ω outputs eliminate 80 resistors, saving 130mm2 of area.
  • Power consumption reduced by 50%.
  • Nine selectable.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
9QXL2000B 20-output very-low-additive phase jitter fanout buffer IDT

Other Datasheets by Renesas

Part Number Description
9QXL2001C PCIe Clock Buffer
9QXL2000B 20-output very-low-additive phase jitter fanout buffer

Full PDF Text Transcription

Click to expand full text
20-Output DB2000QL 9QXL2001B Datasheet Description The 9QXL2001B is a 20-output very-low-additive phase jitter fanout buffer for PCIe Gen4, Gen5 and UPI applications. The 9QXL2001B provides two methods to control output enables; standard OE# pins and SMBus enable bits, or a simple 3-wire serial interface that is independent of the SMBus. The OE Control Mode is set via a hardware strap. It offers integrated terminations for 85Ω transmission lines.
Published: |