HD74HC155 Datasheet | Renesas

Dual 2-to-4-line Decoders/Demultiplexers REJ03D0787-0200 (Previous ADE-205-453) Rev.2.00 Oct 11, 2005 Description This circuit Features dual 1-line-to-4-line demultiplexer with individual strobes and mon binary-address input. When both sections are enabled by the strobes, the mon binary-address inputs sequentially select and route associated input data to the appropriate output of each section. The individual strobes permit activating or inhibiting each of the 4-bit sections as desired. Data applied to input 1C is inverted through its outputs. The inverter following the 1C data input permits use as a 3-to-8-line decoder or 1-to-8-line demultiplexer without external gating. Features - High Speed Operation: tpd (A or B to Y) = 15 ns typ (CL = 50 p F) - High Output Current: Fanout of 10 LSTTL Loads - Wide Operating Voltage: VCC = 2 to 6 V - Low Input Current: 1 µA max - Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) - Ordering...