Description
- 72 Ld QFN, LVDS Mode
PIN NUMBER
1, 2, 17, 28, 29, 33, 34, 37, 38, 41, 42, 49, 50, 53, 54,
57, 58
6, 13, 19, 20, 21, 70, 71, 72
5, 7, 12, 14
27, 32, 62
26, 45, 61, 65
3
LVDS PIN NAME DNC
AVDD AVSS OVDD OVSS NAPSLP
Do Not Connect
LVDS PIN FUNCTION
1.8V Analog Supply Analog Ground 1.8V Output S
Features
- Single supply 1.8V operation.
- Clock duty cycle stabilizer.
- 75fs Clock jitter.
- 700MHz Bandwidth.
- Programmable built-in test patterns.
- Multi-ADC support
- SPI Programmable fine gain and offset control - Support for multiple ADC synchronization - Optimized output timing.
- Nap and sleep modes - 200µs Sleep wake-up time.
- Data output clock.
- DDR LVDS-compatible or LVCMOS outputs.
- Selectable Clock Divider
Applicati.
ISLA216P Datasheet
