R9A06G043GBG
Description
CPU Central processing unit (Cortex-R4) - Operating frequency 196-pin FBGA:150 MHz - 32-bit CPU Cortex-R4 designed by Arm (core revision r1p4) - Address space: 4 Gbytes - Instruction cache: 8 Kbytes (with ECC) - Data cache: 8 Kbytes (with ECC) - Tightly coupled memory (TCM) ATCM: 512 Kbytes (with ECC) BTCM: 32 Kbytes (with ECC) - Instruction set: Arm v7-R architecture, so support includes Thumb® and Thumb-2 - Data arrangement Instructions: Little endian Data: Little endian - Memory protection unit (MPU) FPU (Cortex-R4) - Supports addition, subtraction, multiplication, divi.
Key Features
- On-chip 32-bit Arm Cortex-R4 processor
- High-speed realtime control with maximum operating frequency of 150 MHz Capable of 249 DMIPS
- Tightly coupled memory (TCM) with ECC: 512 Kbytes/32 Kbytes
- Instruction cache/data cache with ECC: 8 Kbytes per cache
- High-speed interrupt
- Harvard architecture with 8-stage pipeline
- Supports the memory protection unit (MPU)
- Arm CoreSight architecture, includes support for debugging through JTAG and SWD interfaces
- Low power consumption
- Standby mode, and module stop function
