RL78G13 Overview
Datasheet RL78/G13 RENESAS MCU R01DS0131EJ0310 Rev.3.10 Nov 15, 2013 True Low Power Platform (as low as 66 µA/MHz, and 0.57 µA for RTC + LVD), 1.6 V to 5.5 V operation, 16 to 512 Kbyte Flash, 41 DMIPS at 32 MHz, for General Purpose Applications 1. OUTLINE.
RL78G13 Key Features
- 1.6 V to 5.5 V operation from a single supply
- Stop (RAM retained): 0.23 µA, (LVD enabled): 0.31 µA
- Halt (RTC + LVD): 0.57 µA
- Snooze: 0.70 mA (UART), 1.20 mA (ADC)
- Operating: 66 µA/MHz 16-bit RL78 CPU Core
- Delivers 41 DMIPS at maximum operating frequency of 32 MHz
- Instruction Execution: 86% of instructions can be executed in 1 to 2 clock cycles
- CISC Architecture (Harvard) with 3-stage pipeline
- Multiply Signed & Unsigned: 16 x 16 to 32-bit result in 1 clock cycle
- MAC: 16 x 16 to 32-bit result in 2 clock cycles
RL78G13 Applications
- 1.6 V to 5.5 V operation from a single supply