VDD = single power supply voltage of 1.6 to 5.5 V which
can operate a 1.8 V device at a low voltage.
HALT mode.
STOP mode.
SNOOZE mode
RL78 CPU Core.
CISC architecture with 3-stage pipeline.
Minimum instruction execution time: Can be changed
from high speed (0.03125 s: @ 32 MHz operation with high-speed on-chip oscillator) to ultra-low speed (30.5 s: @ 32.768 kHz operation with subsystem clock).
Full PDF Text Transcription for RL78G14 (Reference)
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Datasheet RL78/G14 RENESAS MCU R01DS0053EJ0320 Rev. 3.20 Jan 05, 2015 True Low Power Platform (as low as 66 A/MHz, and 0.60 A for RTC + LVD), 1.6 V to 5.5 V operation, ...
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w as 66 A/MHz, and 0.60 A for RTC + LVD), 1.6 V to 5.5 V operation, 16 to 512 Kbyte Flash, 44 DMIPS at 32 MHz, for General Purpose Applications 1. OUTLINE 1.1 Features Ultra-Low Power Consumption Technology • VDD = single power supply voltage of 1.6 to 5.5 V which can operate a 1.8 V device at a low voltage • HALT mode • STOP mode • SNOOZE mode RL78 CPU Core • CISC architecture with 3-stage pipeline • Minimum instruction execution time: Can be changed from high speed (0.03125 s: @ 32 MHz operation with high-speed on-chip oscillator) to ultra-low speed (30.5 s: @ 32.768 kHz operation with subsystem clock) • Multiply/div