uPD46364185B Overview
The μPD46364185B is a 2,097,152-word by 18-bit and the μPD46364365B is a 1,048,576-word by 36-bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. The μPD46364185B and μPD46364365B integrate unique synchronous peripheral circuitry and a burst counter. All input registers controlled by an input clock pair (K and K#) are latched on the...
uPD46364185B Key Features
- 1.8 ± 0.1 V power supply
- 165-pin PLASTIC BGA (13 x 15)
- HSTL interface
- PLL circuitry for wide output data valid window and future frequency scaling
- Separate independent read and write data ports
- DDR read or write operation initiated each cycle
- Pipelined double data rate operation
- Separate data input/output bus
- Two-tick burst for low DDR transaction size
- Two input clocks (K and K#) for precise DDR timing at clock rising edges only