RV1109
Key Features
- Dual-Core Cortex-A7
- Full implementation of the ARM architecture v7-A instruction set, ARM Neon Advanced
- Separately Integrated Neon and FPU
- Unified 512KB L2 Cache for Dual-Core Cortex-A7
- TrustZone technology supported
- Separate power domains for CPU core system to support internal power switch and
- PD_CPU0: 1st Cortex-A7 + Neon + FPU + L1 I/D Cache
- PD_CPU1: 2nd Cortex-A7 + Neon + FPU + L1 I/D Cache
- One isolated voltage domain to support DVFS
- Interface and video input processor
