LAN91C100 Datasheet | SMSC

FEATURES - - - - - - - - Dual Speed CSMA/CD Engine (10 Mbps and 100 Mbps) pliant with IEEE 802.3 100BASE-T Specification Supports 100BASE-TX, 100BASE-T4, and 10BASE-T Physical Interfaces 32 Bit Wide Data Path (Into Packet Buffer Memory) Support for 32 and 16 Bit Buses Support for 32, 16 and 8 Bit CPU Accesses Synchronous, Asynchronous and Burst DMA Interface Mode Options 128 Kbyte External Memory - - - - - - - Built-in Transparent Arbitration for Slave Sequential Access Architecture Flat MMU Architecture with Symmetric Transmit and Receive Structures and Queues MII (Media Independent Interface) pliant MAC-PHY Interface (pliant with Emerging MII Standard Interface) MII Management Serial Interface Seven Wire Interface to 10 Mbps ENDEC (LAN83C694) EEPROM-Based Setup 208 Pin PQFP and TQFP Package GENERAL DESCRIPTION The LAN91C100 FEAST is a high-speed network controller designed to facilitate the implementation of Fast Ethernet adapters and connectivity products. It contains a dual speed CSMA/CD engine that implements the MAC portion of the CSMA/CD protocol at 10 and 100 Mbps and couples it with a lean and fast data and control path system architecture to ensure data movement with no bottlenecks at 100 Mbps. Memory management is handled using a unique MMU (Memory Management Unit) architecture and a 32-bit wide data path. This I/O mapped architecture can sustain back-to-back frame transmission and reception for superior data throughput and optimal performance. It also dynamically allocates buffer memory in an efficient buffer utilization scheme, reducing software tasks and relieving the host CPU from performing these housekeeping functions. The total memory size is 128 Kbytes (external), equivalent to a total chip storage (transmit and receive) of 64 outstanding packets. FEAST provides a flexible slave interface for easy connectivity with industry-standard buses. The Bus Interface Unit (BIU) can handle synchronous as well as asynchronous buses, with different signals...