LAN91C100FD Datasheet | SMSC

Features Dual Speed CSMA/CD Engine (10 Mbps and 100 Mbps) pliant with IEEE 802.3 100BASE-T Specification Supports 100BASE-TX, 100BASE-T4, and 10BASE-T Physical Interfaces 32 Bit Wide Data Path (into Packet Buffer Memory) Support for 32 and 16 Bit Buses Support for 32, 16 and 8 Bit CPU Accesses Synchronous, Asynchronous and Burst DMA Interface Mode Options 128 Kbyte External Memory Built-In Transparent Arbitration for Slave Sequential Access Architecture Early TX, Early RX Functions Flat MMU Architecture with Symmetric Transmit and Receive Structures and Queues MII (Media Independent Interface) pliant MAC-PHY Interface Running at Nibble Rate MII Management Serial Interface Seven Wire Interface to 10 Mbps ENDEC EEPROM-Based Setup Full Duplex Capability ORDERING INFORMATION Order Numbers: LAN91C100-FD for 208 Pin QFP Package LAN91C100-FD for 208 Pin TQFP Package SMSC DS - LAN91C100FD Rev. D Page 1 Rev. 10/14/2002 PRELIMINARY FEAST Fast Ethernet Controller with Full Duplex Capability 80 Arkay Drive Hauppauge, NY 11788 (631) 435-6000 FAX (631) 273-3123 Copyright © SMSC 2004. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, plete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of...