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SR5015-81 - Quad Static Shift Register

Download the SR5015-81 datasheet PDF. This datasheet also covers the SR5015-80 variant, as both devices belong to the same quad static shift register family and are provided as variant models within a single manufacturer datasheet.

General Description

The SMC SR 5015-XXX is a quad static shift register family fabricated using SMC's COPLAMOS@ N channel silicon gate process which provides a higher functional density and speed on a monolithic chip than conventional MaS technology.

Key Features

  • D.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SR5015-80-SMSC.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
SR S01S-XXX SR 5015-80 SR 5015-81 SR 5015-133 Quad Static Shift Register FEATURES D COPLAMOS® N Channel Silicon Gate Technology D Variable Length-Single Mask Programmable-1 to 134 bits D Directly TTL-compatible on all inputs, outputs, and clock D Clear function D Operation guaranteed from DC to 1.0 MHz D Recirculate logic on-chip D Single +5.0V power supply D Low clock input capacitance D 16 pin ceramic DIP Package D Pin for Pin replacement for AMI 82182. 83. 85 PIN CONFIGURATION INPUT A RECASC CLEAR INPUTS OUTPUTS GND Vee OUTPUTC OUTPUT A RID OUTPUTD INPUTD RECD NC INPUTC CLOCK APPLICATIONS D Memory Buffering D Unique Buffering Lengths D Terminals BLOCK DIAGRAM OUTPUT A OUTPUT C REC CONTROL ABC ~"""'--1 I INPUT A "">--+--4 1----<: INPUT C INPUT B 1------< RECIRC.