SST36VF1601 Datasheet | SST

FEATURES : - Organized as 1M x16 - Dual Bank Architecture for Concurrent Read/Write Operation - 16 Mbit Bottom Sector Protection - SST36VF1601: 12 Mbit + 4 Mbit - Single 2.7-3.6V for Read and Write Operations - Superior Reliability - Endurance: 100,000 cycles (typical) - Greater than 100 years Data Retention - Low Power Consumption: - Active Current: 25 m A - Standby Current: 4 µA - Hardware Sector Protection/WP# Input Pin - Protects 4 outermost sectors (4 KWord) in the larger bank by driving WP# low and unprotects by driving WP# high - Hardware Reset Pin (RST#) - Resets the internal state machine to reading array data - Sector-Erase Capability - Uniform 1 KWord sectors - Block-Erase Capability - Uniform 32 KWord blocks - Fast Read Access Time - 70 ns - Latched Address and Data - Fast Erase and Word-Program (typical): - Sector-Erase Time: 18 ms - Block-Erase Time: 18 ms - Chip-Erase Time: 70 ms - Word-Program Time: 14 µs - Chip Rewrite Time: 8 seconds - Automatic Write Timing - Internal VPP Generation - End-of-Write Detection - Toggle Bit - Data# Polling - Ready/Busy# pin - CMOS I/O patibility - Conforms to mon Flash Memory Interface (CFI) - JEDEC Standards - Flash EEPROM Pinouts and mand...