M48Z129V
Key Features
- Integrated, ultra low power SRAM, power-fail
- Conventional SRAM operation; unlimited
- 10 years of data retention in the absence of cpower du
- Microprocessor power-on reset (reset valid roeven during battery backup mode) P
- Battery low pin - provides warning of battery
- Automatic power-fail chip deselect and WRITE protection
- WRITE protect voltages Ob– VCC = 3.0 to 3.6 V; 2.7 V ≤ VPFD ≤ 3.0 V -(VPFD = power-fail deselect voltage) )
- Self-contained battery in the CAPHAT™ DIP t(spackage c
- RoHS pliant Obsolete P– Lead-free second level interconnect
