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M48Z129V - 1 Mbit (128 Kb x 8) ZEROPOWER SRAM

Key Features

  • Integrated, ultra low power SRAM, power-fail control circuit, and battery.
  • Conventional SRAM operation; unlimited )WRITE cycles t(s.
  • 10 years of data retention in the absence of cpower du.
  • Microprocessor power-on reset (reset valid roeven during battery backup mode) P.
  • Battery low pin - provides warning of battery end-of-life lete.
  • Automatic power-fail chip deselect and WRITE protection so.
  • WRITE protect voltages Ob.
  • VCC = 3.0 to 3.6 V; 2.7 V ≤ VPFD ≤ 3.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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M48Z129V 3.3 V, 1 Mbit (128 Kb x 8) ZEROPOWER® SRAM Not recommended for new design Features ■ Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited )WRITE cycles t(s■ 10 years of data retention in the absence of cpower du■ Microprocessor power-on reset (reset valid roeven during battery backup mode) P■ Battery low pin - provides warning of battery end-of-life lete■ Automatic power-fail chip deselect and WRITE protection so■ WRITE protect voltages Ob– VCC = 3.0 to 3.6 V; 2.7 V ≤ VPFD ≤ 3.