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M48Z32V
3.3V, 256Kbit (32Kbit x 8) ZEROPOWER® SRAM
Features
■ Integrated, ultra low power SRAM, and power-
fail control circuit
)■ READ cycle time equals WRITE cycle time t(s■ Automatic power-fail chip deselect and WRITE cprotection du■ WRITE protect voltages: ro(VPFD = Power-fail deselect voltage) P )– M48Z32V: 2.7V ≤ VPFD ≤ 3.0V te t(s■ Ultra-low standby current le c■ RoHS COMPLIANT OObbssoolleettee PPrroodduucctt((ss)) -- OObbssoolete Produ– Lead-free second level interconnect
44 1
SO44 (MT) 44-pin SOIC
November 2007
Rev 3
1/19
www.st.com
1
Contents
Contents
M48Z32V
1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .