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M58MR032C Datasheet 32 Mbit 2mb X16 / Mux I/o / Dual Bank / Burst 1.8v Supply Flash Memory

Manufacturer: STMicroelectronics

Overview: M58MR032C M58MR032D 32 Mbit (2Mb x16, Mux I/O, Dual Bank, Burst) 1.8V Supply Flash Memory PRELIMINARY DATA s SUPPLY VOLTAGE – VDD = VDDQ = 1.7V to 2.0V for Program, Erase and Read s s – VPP = 12V for fast Program (optional) MULTIPLEXED ADDRESS/DATA SYNCHRONOUS / ASYNCHRONOUS READ – Burst mode Read: 40MHz – Page mode Read (4 Words Page) – Random Access: 100ns FBGA TFBGA48 (ZC) 10 x 4 ball array s PROGRAMMING TIME – 10µs by Word typical – Two or four words programming option s MEMORY BLOCKS – Dual Bank Memory Array: 8/24 Mbit – Parameter Blocks (Top or Bottom location) Figure 1. Logic Diagram s DUAL OPERATIONS – Read within one Bank while Program or Erase within the other – No delay between Read and Write operations VDD VDDQ VPP 5 A16-A20 W E G RP WP L K M58MR032C M58MR032D BINV WAIT 16 ADQ0-ADQ15 s PROTECTION/SECURITY – All Blocks protected at Power-up – Any combination of Blocks can be protected – 64 bit unique device identifier – 64 bit user programmable OTP cells – One parameter block permanently lockable s s COMMON FLASH INTERFACE (CFI) 100,000 PROGRAM/ERASE CYCLES per BLOCK ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Top Device Code, M58MR032C: 88DAh – Bottom Device Code, M58MR032D: 88DBh s VSS AI90019 August 2002 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/52 M58MR032C, M58MR032D Figure 2.

General Description

The M58MR032 is a 32 Mbit non-volatile Flash memory that may be erased electrically at block level and programmed in-system on a Word-byWord basis using a 1.7V to 2.0V V DD supply

Key Features

  • asymmetrically blocked architecture. M58MR032 has an array of 71 blocks and is divided into two banks A and B, providing Dual Bank operations. While programming or erasing in Bank A, read operations are possible into Bank B or vice versa. Only one bank at the time is allowed to be in program or erase mode. It is possible to perform burst reads that cross bank boundaries. The memory features an erase suspend allowing reading or programming in another block. Once suspended the erase can be resumed.

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