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MK5027 - SS7 SIGNALLING LINK CONTROLLER

Datasheet Summary

Description

conductor device which provides a complete link control function conforming to the 1988 CCITT version of SS7.

Features

  • of the MK5027 is its buffer management which includes on-chip DMA. This feature allows users to handlq multiple packets of receive and transmit data at a time. (A conventional data linkcontrol chip plus a separate DMA chip would handle data for only a single block at a time. ) The MK5027 may be used with any of several popular 16 and 8 bit microprocessors, such as 68000, 6800, Z8000, Z80, LSI-11, 8086, 8088, 8080, etc. Figure 1: Pin Connection. VSS-GND DAL07 DAL06 DAL05 DAL04 DAL03 DAL02 DAL01 DA.

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Datasheet Details

Part number MK5027
Manufacturer STMicroelectronics
File Size 183.66 KB
Description SS7 SIGNALLING LINK CONTROLLER
Datasheet download datasheet MK5027 Datasheet
Additional preview pages of the MK5027 datasheet.

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Full PDF Text Transcription

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MK5027 SS7 SIGNALLING LINK CONTROLLER CMOS FULLY COMPATIBLE WITH BOTH 8 OR 16 BIT SYSTEMS SYSTEM CLOCK RATE TO 10MHz. DATA RATE UP TO 2.5Mbps FOR SS7 PROTOCOL PROCESSING,7Mbps FOR TRANSPARENT HDLC MODE COMPLETE LEVEL 2 IMPLEMENTATION COMPATIBLE WITH 1988 CCITT, AT&T, ANSI, AND BELLCORE SIGNALLING SYSTEM NUMBER 7 LINK LEVEL PROTOCOLS 52 PIN PLCC AND 48-PIN DIP PIN-FOR-PIN COMPATIBLE WITH THE SGS-THOMSON X.25 CHIP (MK5025) AND NEARLY PIN-FORPIN COMPATIBLE WITH THE SGS-THOMSON VLANCE CHIP (MK5032) BUFFER MANAGEMENT INCLUDES: - Initialization Block - Separate Receive and Transmit Rings - Variable Descriptor Ring and Window Sizes.
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