ST14C02C Datasheet | STMicroelectronics

DESCRIPTION This device is an electrically erasable programmable memory (EEPROM) fabricated with STMicroelectronics’s High Endurance, Advanced Polysilicon, CMOS technology. This guarantees an endurance typically well above one million Erase/Write cycles, with a data retention of 10 years. The memory operates with a power supply as low as 3 V. The device is available in wafer form (either sawn or unsawn) and in micromodule form (on film). The memory is patible with the I2C standard. This is a two wire serial interface that uses a bi-directional data bus and serial clock. The memory carries a built-in 7-bit unique Device Type Identifier code (1010000) in accordance with the I 2C bus definition. Only one memory can be attached to each I2C bus. Wafer Figure 1. Logic Diagram Table 1. Signal Names SDA Serial Data/Address Input/ Output Serial Clock Write Mode Supply Voltage Ground ST14C02C MODE SCL MODE VCC GND AI01162 DS.ST14C02C/9811V2 1/12 Figure 2. D15 Contact Connections Figure 3. D20 Contact Connections VCC VCC GND SCL SCL SDA SDA MODE AI02492 AI02491 The memory behaves as a slave device in the I2C protocol, with all memory operations synchronized by the serial clock. Read and write operations are initiated by a START condition, generated by the bus master. The START condition is followed by the Device Select Code which is posed of a stream of 7 bits (1010000), plus one read/write bit (R/W) and is terminated by an acknowledge bit. When writing data to the memory, the memory inserts an acknowledge bit during the 9th bit time, following the bus master’s 8-bit transmission. When data is read by the bus master, the bus master acknowledges the receipt of the data byte in the same way. Data transfers are terminated by a STOP condition after an Ack for WRITE, and after a No ACK for READ. Power On Reset: V CC Lock-Out Write Protect In order to prevent data corruption and inadvertent write operations during power up, a Power On...