STLC5048 Datasheet | STMicroelectronics

FULLY PROGRAMMABLE FOUR CHANNEL CODEC AND FILTER s s s s s s s s s s s s s s s s s s FULLY PROGRAMMABLE MONOLITHIC 4 CHANNEL CODEC/FILTER SINGLE +3.3V SUPPLY A/m LAW PROGRAMMABLE LINEAR CODING (16 BITS) OPTION PCM HIGHWAY FORMAT AUTOMATICALLY DETECTED:1.536 or 1.544 MHz2.048, 4.096, 8192 MHz TWO PCM PORTS AVAILABLE TX GAIN PROGRAMMING: 33d B RANGE; <0.01d B STEP RX GAIN PROGRAMMING:42d B RANGE; <0.01d B STEP PROGRAMMABLE SLIC INPUT IMPEDANCE PROGRAMMABLE TRANSHYBRID BALANCE FILTER PROGRAMMABLE EQUALIZATION (FREQUENCY RESPONSE) PROGRAMMABLE TIME SLOT ASSIGNMENT DIGITAL AND ANALOG LOOPBACKS SLIC CONTROL PORTSTATIC (16 I/Os) DYNAMIC (12 I/Os + 4 CS) BUILT-IN TEST MODE WITH TONE GENERATION, MCU ACCESS TO PCM DATA 64 TQFP (10X10mm) PACKAGE PROGRAMMABLE SLIC LINE CURRENT LIMITATION PROGRAMMABLE SLIC OFF-HOOK DETECTION THRESHOLD TQFP64 (10x10mm) ORDERING NUMBER: STLC5048 buffer driving the SLIC RX input and on an amplifier input stage normally driven by the SLIC TX output. Due to the single supply voltage a midsupply reference level is generated internally by the device and all analog signals are referred to this level (AGND). The PCM interface uses one mon 8KHz frame sync. pulse for transmit and receive direction. The bit clock is automatically detected between four standards: 1.563/1.544MHz, 2.048MHz, 4.096MHz, 8192MHz. Two PCM port are provided: the channels can be connected to port A or/and B. Device programmability is achieved by means of several registers and mands allowing to set the different parameters like TX/RX gains, line impedance, transhybrid balance, equalization (frequency response), encoding law (A/µ), time slot assignment, independent channels power up/down, loopbacks, PCM bits offset. The STLC5048 can be programmed via serial interface running up to 8 MHz. One interrupt output pin is also provided. A GUI interface is also available to emulate and program the coefficients for impedance synthesis, echo cancelling and channel filtering. DESC...