STLC60134S Datasheet | STMicroelectronics

® TOSCA™ INTEGRATED ADSL CMOS ANALOG FRONT-END CIRCUIT FULLY INTEGRATED AFE FOR ADSL OVERALL 12 BIT RESOLUTION, 1.1MHz SIGNAL BANDWIDTH 8.8MS/s ADC 8.8MS/s DAC THD: -60d B @FULL SCALE 4-BIT DIGITAL INTERFACE TO/FROM THE DMT MODEM 1V FULL SCALE INPUT DIFFERENTIAL ANALOG I/O ACCURATE CONTINUOUS-TIME CHANNEL FILTERING 3rd & 4th ORDER TUNABLE CONTINUOUS TIME LP FILTERS 0.5 WATT AT 3.3V 0.5µm HCMOS5 LA TECHNOLOGY 64 PIN TQFP PACKAGE DESCRIPTION STLC60134S is the Analog Front End of the STMicroelectronics Tosca™ ADSL chipset and when coupled with STLC60135 (DTM modem) al Figure 1. Block Diagram TQFP64 ORDERING NUMBER: STLC60134S lows to get a T1.413 Issue 2 pliant solution. The STLC60134S analog front end handles 2 transmission channels on a balanced 2 wire interconnection; a 16 to 640Kbit/s upstream channel and a 1.536 to 8.192Mbit/s downstream channel. A 256 carrier DMT coding (frequency spacing 4.3125k Hz) transforms the downstream channel to a 1MHz bandwidth analog signal (tones 32255) and the upstream channel (tones 8-31) to a 100k Hz bandwidth signal on the line. This asymmetrical data transmission system uses high resolution, high speed analog to digital and digital to analog conversion and high order analog filtering to reduce the echo and noise in both R-MOS-C TUNING I/V-REF XTAL-DRIVER VCXO DAC ADC G=-15...0d B step=1d B - + + - ERROR CORRECTION 13 bits TXP TXN ANALOG LOOP MUX 1.1MHz 1.1MHz 138KHz 4 bits DIGITAL IF DIGITAL LOOP AGCtx HC2 HC1 SC2 G=0..31d B step=1d B + - + RXP(0:1) RXN(0:1) 12 bits 4 bits AGCrx D99TL453 August 1999 1/22 STLC60134S the ATU-C/ATU-R receivers and transmitters. External low noise driver and input stage used with STLC60134S guarantee low noise performances. The STLC60134S chip can be used at ATU-C and ATU-R ends (behaviour set by LTNT pin). The selection consists mainly of a filter interchange between the RX and TX path. The filters (with a programmable cutoff frequency) use automatic...