DESCRIPTION
OF ”B” SERIES CMOS DEVICES” EY Plastic Package F Ceramic Frit Seal Package M1 Micro Package C1 Plastic Chip Carrier ORDER CODES : HCC4099BF HCF4099BM1 HCF4099BEY HCF4099BC1 PIN CONNECTIONS DESCRIPTION
Data are inputted to a particular bit in the latch when that bit is addressed (by means of inputs A0, A1, A2) and when WRITE DISABLE is at a low level. When WRITE DISABLE is high, data entry is inhibited ; however, all 8 outputs can be continuously read independent of WRITE DISABLE and address inputs. A master RESET input is available, which resets all bits to a logic ”0” level when RESET and WRITE DISABLE are at a high level. When RESET is at a high level, and WRITE DISABLE is at a low level, the latch acts as a 1-of-8 demultiplexer ; the bit that is addressed has an active output which follows the data input, while all unaddressed bits are held to a logic ”0” level. September 1988 1/14 HCC/HCF4099B FUNCTIONAL DIAGRAM ABSOLUTE MAXIMUM RATINGS
Symbol V DD* Vi II Pt ot Paramete...
STMicroelectronics
