DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION 1 SI Serial Data Inputs 2, 3, 4, 5, 10, 11, 12, 14 A to H Parallel Data Inputs 6 CLOCK INH Clock Enable Input (Active Low) 7 CLOCK Clock Input (LOW to HIGH, Edge Triggered 9 CLEAR Asynchronous Master Reset Input (Active Low) 13 QH Serial Output from the Last Stage 15 SHIFT/LOAD Parallel Enable Input (Active Low) 8 GND Ground (0V) 16 Vcc Positive Supply Voltage t(s)TRUTH TABLE ucINPUTS INTERNAL OUTPUTS OUTPUTS rodCLEAR SHIFT/ LOAD CLOCK INH CLOCK SERIAL IN PARALLEL A..........H QA QB QH PL X X X X X L L L teL X X XX NO CHANGE oleH L L X a..............h a b h bsH H L H X H QAn QGn OH H L L -H X H X X t(s)X : Don’t Care Obsolete Produca........h : The level of steady input voltage at inputs a through H respectively X X L QAn QGn NO CHANGE 2/12 LOGIC DIAGRAM M74HC166 te Product(s)This logic diagram has not be used to estimate propagation delays Obsolete Product(s) - ObsoleTIMING CHART 3/12 M74HC166 ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value...
STMicroelectronics
