DESCRIPTION
It contains a 4-stage divide-by-8 Johnson counter with 8 decoded outputs (Q0-Q7) and a Carry-out bit. This counter is advanced on the positive edge of the clock signal when CLOCK ENABLE input is held low, or is advanced on the negative edge of clock enable signal when CLOCK input is held high, and the selected one of eight outputs goes high. Holding the CLEAR input high clears the counter to zero regardless of the other input conditions. All inputs are equipped with protection circuits against static discharge and transient excess voltage. NC = No Internal Connection October 1992 1/12 M54/M74HC4022 INPUT AND OUTPUT EQUIVALENT CIRCUIT TRUTH TABLE CLOCK CE X X L X X H L L H H X: DON’T CARE LOGIC DIAGRAM CLEAR H L L L L L L DECODER OUTPUT (H) Q0 NO CHANGE NO CHANGE NO CHANGE + 1 NO CHANGE NO CHANGE NO CHANGE + 1 2/12 TIMING CHART M 54/ M74H C4022 PIN DESCRIPTION
PIN No 3, 2, 4, 7, 10, 1, 5, 11 6, 9 12 13 SYMBOL Q0 to Q7 NC CARRY OUT CE 14 CLOCK 15 CLEAR 8 GND 16 VCC NAME AND F...
STMicroelectronics
