STMicroelectronics SPC574S60E3
32-bit Power Architecture microcontroller
FEATURES
● AEC-Q100 qualified● High performance e200z4d dual core – 32-bit Power Architecture technology CPU – Core frequency as high as 140 MHz – Dual issue 5-stage pipeline in-order execution core – Variable Length Encoding (VLE) – Core MPU – Floating Point, End-to-End Error Correction – 8 KB instruction cache with error detection code – 32 KB local data RAM and 4 KB data cache along with 8 KB instruction cache
● 1600 KB (1.5 MB code + 64 KB data) on-chip flash memory: supports read during program and erase operations, and multiple blocks allowing EEPROM emulation
● 128 KB on-chip RAM (96 KB on chip RAM + 32 KB local data RAM)
● Multi-channel direct memory access controller (eDMA) with 32 channels
● Comprehensive new generation ASILD safety concept – ASILD SEooC approach (Safety Element out of Context) – FCCU for collection and reaction to failure notifications – Memory Error Management Unit (MEMU) for collection and reporting of error events in memories – End-to-end Error Correctio...