DESCRIPTION
The members of Signal Names CLK RST Function code B I/O VCC GND Data Input / Output Supply Voltage Clock Figure 1. Logic Diagram VCC RST B ST1331 ST1333 ST1353 I/O CLK GND Ground AI03105b October 1999 Complete data available under NDA. 1/3 ST1331, ST1333, ST1353 Figure 2. Memory Map 16 masked bits Circuit Identification Area Card Identification Area (ID) 0 16 Physical EEPROM Cells 32 bits RAM1 (Write-Only) (RN) (ST1333, ST1353) 0 32 48 bits Data Area (CD) 40 bits 8 bits 16 bits (Counters and Transport Code) Reserved Area (RA) Certificate (CER) Issuer-Defined Area (ST1331) 64 bits Authentication Secret Key (SK) (ST1333, ST1353) 64 104 112 128 Physical EEPROM Cells 192 Reserved Area (RA) 256 260 264 288 Physical EEPROM Cells 32 bits Anti-Tearing Flags 320 4 bits 4 bits 24 bits Signature Fuses Unused 56 bits User-Defined Area 376 AI03384 Note: 1. The write-only RAM area (RN) is applicable only for the User Configuration. a byte-wise fashion for internal erasing. An on-chip address counter provides an internal address space of up to 512 bits.
STMicroelectronics
