STA120 Datasheet PDF | STMicroelectronics

STMicroelectronics STA120

The STA120 is a monolithic CMOS device that receives and decodes audio data according to the AES/EBU, IEC 958, S/PDIF, & EIAJ CP-340/1201 interface standards. The STA120 recovers the clock and synchronizaBLOCK DIAGRAM tion signals and de-multiplexes the audio and digital data. The STA120 de-multiplexes the channel, user and validity data directly to serial output pins with dedicated output pins for the most important channel status bits.

Part No.	STA120
Datasheet	STA120 Download
Manufacturer	STMicroelectronics
Description	DIGITAL AUDIO INTERFACE RECEIVER
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DESCRIPTION

Differential or single ended inputs can be decoded. VD+ 7 DGND 8 VA+ 22 FILT 20 AGND MCK 21 19 M3 17 M2 18 M1 24 M0 23 26 9 RS422 Receiver CLOCK & DATA RECOVERY DE MUX AUDIO SERIAL PORT 12 11 SDATA SCK FSYNC RXP RXN 10 1 REGISTERS 14 28 C U VREF MUX MUX 13 CS12/FCK 16 SEL 6 5 4 3 2 27 25 ERF 15 CBL D97AU613A C0/E0 Ca/E1 Cb/E2 Cc/F0 Cd/F1 Ce/F2 December 2002 1/15 STA120

ABSOLUTE MAXIMUM RATINGS

Symbol VD+, VA+ VIN Tamb Tstg Power Supply Voltage Input Voltage ( excluding pins 9, 10) Ambient Operating Temperature (power applied) Storage Temperature Parameter Value 4 -0.3 to VD+ +0.3 -30 to +85 -40 to 150 Unit V V °C °C PIN CONNECTIONS (Top view) C Cd/F1 Cc/F0 Cb/E2 Ca/E1 C0/E0 VD+ DGND RXP RXN FSYNC SCK CS12/FCK U 1 2 3 4 5 6 7 8 9 10 11 12 13 14 D97AU609A 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VERF Ce/F2 SDATA ERF M1 M0 VA+ AGND FILT MCK M2 M3 SEL CBL PINS

DESCRIPTION

N. 7 8 21 22 11 12 Name VD+ DGND AGND VA+ FSYNC SCK

DESCRIPTION

Positive Digital Power.Positive supply for the digital section.