Download STP9NM50N Datasheet PDF
STP9NM50N page 2
Page 2
STP9NM50N page 3
Page 3

STP9NM50N Description

This series of devices implements second generation MDmesh™ technology. This revolutionary Power MOSFET associates a new vertical structure to the pany’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters.

STP9NM50N Key Features

  • 100% avalanche tested Low input capacitance and gate charge Low gate input resistance