SPP3401D Description
The SPP3401D is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook puter power management and other battery powered circuits, and low in-line power loss...
SPP3401D Key Features
- 30V/-4.0A,RDS(ON)=70mΩ@VGS=-10V
- 30V/-3.2A,RDS(ON)=90mΩ@VGS=-4.5V
- 30V/-1.2A,RDS(ON)=115mΩ@VGS=-2.5V
- Super high density cell design for extremely low
- Exceptional on-resistance and maximum DC
- SOT-23 package design
SPP3401D Applications
- Power Management in Note book