SPP4435B Datasheet | SYNC POWER

P-Channel Enhancement Mode MOSFET DESCRIPTION The SPP4435B is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application , notebook puter power management and other battery powered circuits where high-side switching . APPLICATIONS z Power Management in Note book z Portable Equipment z Battery Powered System z DC/DC Converter z Load Switch z DSC z LCD Display inverter Features ‹ -30V/-9.2A,RDS(ON)= 24mΩ@VGS=- 10V ‹ -30V/-7.0A,RDS(ON)= 30mΩ@VGS=-4.5V ‹ Super high density cell design for extremely low RDS (ON) ‹ Exceptional on-resistance and maximum DC current capability ‹ SOP - 8P package design PIN CONFIGURATION(SOP - 8P) .. PART MARKING 2008/12/26 Ver.1 Page 1 P-Channel Enhancement Mode MOSFET PIN DESCRIPTION Pin 1 2 3 4 5 6 7 8 Symbol S S S G D D D D Description Source Source Source Gate Drain Drain Drain Drain ORDERING INFORMATION Part Number SPP4435BS8RGB Package SOP- 8P Part Marking SPP4435B ※ SPP4435BS8RGB : 13”Tape Reel ; Pb - Free; Halogen - Free ABSOULTE MAXIMUM RATINGS (TA=25℃ Unless otherwise noted) Parameter Drain-Source Voltage .. Symbol VDSS VGSS TA=25℃ TA=70℃ ID IDM IS TA=25℃ TA=70℃ PD TJ TSTG RθJA Typical -30 ±20 Unit V V A A A W ℃ ℃ ℃/W Gate - Source Voltage Continuous Drain Current(TJ=150℃) Pulsed Drain Current Continuous Source Current(Diode Conduction) Power Dissipation Operating Junction Temperature Storage Temperature Range Thermal Resistance-Junction to Ambient -10.0 -7.0 -50 -2.3 2.8 1.8 -55/150 -55/150...