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Gre r Pro
STS126
Ver 2.0
S a mHop Microelectronics C orp.
N-Channel Logic Level Enhancement Mode Field Effect Transistor
PRODUCT SUMMARY
V DSS
100V
FEATURES Super high dense cell design for low R DS(ON). Rugged and reliable. Surface Mount Package.
ID
1.4A
R DS(ON) (m Ω) Max
312 @ VGS=10V
S OT-23
D S G
D
G
S
ABSOLUTE MAXIMUM RATINGS ( T A=25 °C unless otherwise noted ) Symbol VDS VGS ID IDM PD TJ, TSTG Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous -Pulsed
b a
Limit 100 ±20 TA=25°C TA=70°C TA=25°C TA=70°C 1.4 1.1 5.3
a
Units V V A A A W W °C
Maximum Power Dissipation
1.25 0.