K4S280832I Datasheet PDF (JEDEC standard 3.3V power supply LVTTL compatible) | Download Samsung Semiconductor K4S280832I

K4S280832I - JEDEC standard 3.3V power supply LVTTL compatible

This page provides the datasheet information for the K4S280832I, a member of the K4S281632I JEDEC standard 3.3V power supply LVTTL compatible family.

Description

The K4S280432I / K4S280832I / K4S281632I is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 words by 4 bits / 4 x 4,194,304 words by 8 bits / 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Features

JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave).
All inputs are sampled at the positive going edge of the system clock.
Burst read single-bit write operation.
DQM (x4,x8) & L(U)DQM (x16) for masking.
Auto & self refresh.
64ms.

Datasheet Details

Part number	K4S280832I
Manufacturer	Samsung Semiconductor
File Size	252.84 KB
Description	JEDEC standard 3.3V power supply LVTTL compatible
Datasheet	K4S280832I Datasheet
Additional preview pages of the K4S280832I datasheet.

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Full PDF Text Transcription

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K4S280432I www.DataSheet4U.com K4S280832I K4S281632I Synchronous DRAM 128Mb I-die SDRAM Specification INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND. 1. For updates or additional information about Samsung products, contact your nearest Samsung office. 2.

Published: Oct 11, 2007 |