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KM736V790 - 128Kx36 Synchronous SRAM

Datasheet Summary

Description

The KM736V790 is a 4,718,592-bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System.

Features

  • Synchronous Operation.
  • 2 Stage Pipelined operation with 4 Burst.
  • On-Chip Address Counter.
  • Self-Timed Write Cycle.
  • On-Chip Address and Control Registers.
  • VDD= 3.3V+0.3V/-0.165V Power Supply.
  • VDDQ Supply Voltage 3.3V+0.3V/-0.165V for 3.3V I/O or 2.5V+0.4V/-0.125V for 2.5V I/O.
  • 5V Tolerant Inputs Except I/O Pins.
  • Byte Writable Function.
  • Global Write Enable Controls a full bus-width write.
  • Po.

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Datasheet Details

Part number KM736V790
Manufacturer Samsung Semiconductor
File Size 297.54 KB
Description 128Kx36 Synchronous SRAM
Datasheet download datasheet KM736V790 Datasheet
Additional preview pages of the KM736V790 datasheet.

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Full PDF Text Transcription

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KM736V790 Document Title 128Kx36-Bit Synchronous Pipelined Burst SRAM 128Kx36 Synchronous SRAM Revision History Rev. No. 0.0 0.1 History Initial draft Change speed symbol 6.0/6.7/7.5/8.5 to 60/67/75/85, Change 7.5 bin to 7.2 Change speed bin from 60/67/75/85 to 72/85/10. Change DC characteristics V DD condition from 3.3V±5% to 3.3V+10%/-5% Change Input/output leackage currant for ±1µ A to ±2µA, Insert Note 4 at AC timing characteristics. Modify read timing & Power down cycle timing. Change ISB2 value from 10mA to 20mA. Remove Low power version. Change Undershoot spec from -3.0V(pulse width≤20ns) to -2.0V(pulse width≤tCYC/2) Add Overshoot spec 4.6V((pulse width≤tCYC/2) Change VIN max from 5.5V to VDD+0.5V Change ISB2 value from 20mA to 30mA. Change VDD condition from VDD=3.
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