• Part: K4M51323PC
  • Description: Mobile-SDRAM
  • Manufacturer: Samsung Semiconductor
  • Size: 170.41 KB
K4M51323PC Datasheet (PDF) Download
Samsung Semiconductor
K4M51323PC

Description

The K4M51323PC is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle.

Key Features

  • 1.8V power supply. LVCMOS compatible with multiplexed address. Four banks operation. MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).
  • EMRS cycle with address key programs.
  • All inputs are sampled at the positive going edge of the system clock.
  • Burst read single-bit write operation.
  • Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh) -. DS (Driver Strength) -. DPD (Deep Power Down)
  • DQM for masking.
  • Auto refresh.
  • 64ms refresh period (8K cycle).
  • Extended Temperature Operation (-25°C ~ 85°C).
  • Commercial Temperature Operation (-25°C ~ 70°C).