K4M56323PG-F Datasheet PDF - Samsung semiconductor 2M x 32Bit x 4 Banks Mobile SDRAM Specs

K4M56323PG-F - 2M x 32Bit x 4 Banks Mobile SDRAM

Datasheet Summary

Description

The K4M56323PG is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology.

Features

1.8V power supply.
LVCMOS compatible with multiplexed address.
Four banks operation.
MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).
EMRS cycle with address key programs.
All inputs are sampled at the positive going edge of the system clock.
Burst read single-bit write operation.
Special Function Support. -. PASR (Parti.

Datasheet Details

Part number	K4M56323PG-F
Manufacturer	Samsung semiconductor
File Size	184.11 KB
Description	2M x 32Bit x 4 Banks Mobile SDRAM
Datasheet	K4M56323PG-F Datasheet
Additional preview pages of the K4M56323PG-F datasheet.

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Full PDF Text Transcription

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K4M56323PG-F(H)E/G/C/F 2M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA FEATURES • 1.8V power supply. • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). • EMRS cycle with address key programs. • All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation. • Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh) -. DS (Driver Strength) -. DPD (Deep Power Down) • DQM for masking. • Auto refresh. • • • • 64ms refresh period (4K cycle). Commercial Temperature Operation (-25°C ~ 70°C).

Published: Dec 23, 2009 |