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K4S561632D - 256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL

Download the K4S561632D datasheet PDF. This datasheet also covers the K4S variant, as both devices belong to the same 256mbit sdram 4m x 16bit x 4 banks synchronous dram lvttl family and are provided as variant models within a single manufacturer datasheet.

General Description

The K4S561632D is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 16 bits, fabricated with SAMSUNG's high performance CMOS technology.

Key Features

  • JEDEC standard 3.3V power supply.
  • LVTTL compatible with multiplexed address.
  • Four banks operation.
  • MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave).
  • All inputs are sampled at the positive going edge of the system clock.
  • Burst read single-bit write operation.
  • DQM for masking.
  • Auto & self refresh.
  • 64ms refresh period (8K Cycle.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (K4S-561632D.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
K4S561632C 256Mbit SDRAM Samsung
K4S561632E-UC60 SDRAM 256Mb E-die Samsung
K4S561632E-UC75 SDRAM 256Mb E-die Samsung
K4S561632H 256Mb H-Die SDRAM Samsung Electronics
K4S560432E-UC75 SDRAM 256Mb E-die Samsung

Other Datasheets by Samsung Semiconductor

Part Number Description
K4S561632A 256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL
K4S561632B 256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL
K4S561632E-NC60 SDRAM 256Mb E-die
K4S561632E-NC75 SDRAM 256Mb E-die
K4S561632E-NCL60 SDRAM 256Mb E-die

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com K4S561632D CMOS SDRAM 256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL DataSheet4U.com DataShee Revision 0.1 Aug. 2002 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 0.1 Aug. 2002 DataSheet4U.com DataSheet4U.com www.DataSheet4U.com K4S561632D Revision History Revision 0.0 (Jan., 2002) -First generation CMOS SDRAM Revision 0.1(Aug.,2002) - ICC6 of Low power is changed from 1.0 to 1.5 due to typo. et4U.com DataSheet4U.com DataShee Rev. 0.1 Aug. 2002 DataSheet4U.com DataSheet4U.com www.DataSheet4U.com K4S561632D 4M x 16Bit x 4 Banks Synchronous DRAM FEATURES • JEDEC standard 3.