K4X51323PC-7G Overview
Preliminary K4X51323PC - 7(8)E/G Mobile-DDR SDRAM .. History 0.0 0.1 0.2 - First version for target specification - Insertion of PKG dimension of 90FBGA JEDEC Standard type. - Preliminary Datasheet - Insertion DC Current value.
K4X51323PC-7G Key Features
- 1.8V power supply, 1.8V I/O power
- Double-data-rate architecture; two data transfers per clock cycle
- Bidirectional data strobe(DQS)
- Four banks operation
- Differential clock inputs(CK and CK)
- MRS cycle with address key programs
- CAS Latency ( 2, 3 )
- Burst Length ( 2, 4, 8, 16 )
- Burst Type (Sequential & Interleave)
- Partial Self Refresh Type ( Full, 1/2, 1/4 Array )