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K4X56163PE-LG - 16M x16 Mobile DDR SDRAM

General Description

Clock : CK and CK are differential clock inputs.

All address and control input signals are sampled on the crossing of the positive edge of CK and negative edge of CK.

Internal clock signals are derived from CK/CK.

Key Features

  • Mobile-DDR SDRAM.
  • 1.8V power supply, 1.8V I/O power.
  • Double-data-rate architecture; two data transfers per clock cycle.
  • Bidirectional data strobe(DQS).
  • Four banks operation.
  • Differential clock inputs(CK and CK).
  • MRS cycle with address key programs - CAS Latency ( 3 ) - Burst Length ( 2, 4, 8 ) - Burst Type (Sequential & Interleave) - Partial Self Refresh Type ( Full, 1/2, 1/4 array ) - Internal Temperature Compensated Self Refresh - Driver.

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Other Datasheets by Samsung Semiconductor

Part Number Description
K4X56163PE-LFG 16M x16 Mobile DDR SDRAM
K4X56163PE 16M x16 Mobile DDR SDRAM
K4X56163PG-FE 16M x16 Mobile-DDR SDRAM
K4X56163PG-FG 16M x16 Mobile-DDR SDRAM
K4X56163PG-LE 16M x16 Mobile-DDR SDRAM
K4X56163PG-LG 16M x16 Mobile-DDR SDRAM
K4X56163PI-FE 16Mx16 Mobile DDR SDRAM
K4X56163PI-FG 16Mx16 Mobile DDR SDRAM
K4X56163PI-LE 16Mx16 Mobile DDR SDRAM
K4X56163PI-LG 16Mx16 Mobile DDR SDRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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K4X56163PE-L(F)G 16M x16 Mobile DDR SDRAM FEATURES Mobile-DDR SDRAM • 1.8V power supply, 1.8V I/O power • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Four banks operation • Differential clock inputs(CK and CK) • MRS cycle with address key programs - CAS Latency ( 3 ) - Burst Length ( 2, 4, 8 ) - Burst Type (Sequential & Interleave) - Partial Self Refresh Type ( Full, 1/2, 1/4 array ) - Internal Temperature Compensated Self Refresh - Driver strength ( 1, 1/2, 1/4, 1/8 ) • All inputs except data & DM are sampled at the positive going edge of the system clock(CK). • Data I/O transactions on both edges of data strobe, DM for masking. • Edge aligned data output, center aligned data input. • No DLL; CK to DQS is not synchronized.