K7N401801M Overview
The K7N403601M and K7N401801M are 4,718,592 bits Synchronous Static SRAMs. The NtRAMTM, or No Turnaround Random Access Memory utilizes all the bandwidth in any bination of operating cycles. Address, data inputs, and all control signals except output enable and linear burst order are synchronized to input clock.
K7N401801M Key Features
- 3.3V+0.165V/-0.165V Power Supply
- Byte Writable Function
- Enable clock and suspend operation
- Single READ/WRITE control pin
- Self-Timed Write Cycle
- Three Chip Enable for simple depth expansion with no data contention
- Α interleaved burst or a linear burst mode
- Asynchronous output enable control
- Power Down mode
- TTL-Level Three-State Outputs