KM4132G271B Datasheet | Samsung Semiconductor

description (PQFP, TQFP) in AC PARAMETER . - Changed some values in FREQUENCY vs. AC PARAMETER RELATIONSHIP TABLE. PACKAGE DIMENSIONS. -2- Rev. 2.4 (May 1998) 128K x 32Bit x 2 Banks Synchronous Graphic RAM FEATURES - - - - JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Dual bank / Pulse RAS MRS cycle with address key programs -. CAS Latency (2, 3) -. Burst Length (1, 2, 4, 8 & full page) -. Burst Type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock Burst Read Single-bit Write operation DQM 0-3 for byte masking Auto & self refresh 16ms refresh period (1K cycle) 100 Pin PQFP, TQFP (14 x 20 mm) Reverse Type Package offers the best signal routing CMOS SGRAM GENERAL DESCRIPTION The KM4132G271B is 8,388,608 bits synchronous high data rate Dynamic RAM organized as 2 x 131,072 words by 32 bits, fabricated with SAMSUNG's high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length, and programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory system applications. Write per bit and 8 columns block write improves performance in graphics systems. - - - - - - - ORDERING INFORMATION Part NO. KM4132G271BQ(R)-7 KM4132G271BQ(R)-8 KM4132G271BQ(R)-10 KM4132G271BTQ(R)-7 KM4132G271BTQ(R)-8 KM4132G271BTQ(R)-10 Max Freq. 143MHz 125MHz 100MHz 143MHz 125MHz 100MHz LVTTL 100 TQFP LVTTL 100 PQFP Interface Package Graphics Features - SMRS cycle. -. Load mask register -. Load color register - Write Per Bit(Old Mask) - Block Write(8 Columns) - ~G271BQR# / ~G271BTQR# : Reverse Type...