HYB39S16160CT-8 - 16 MBit Synchronous DRAM

Pin Names CLK CKE CS RAS CAS WE A0 - A10 A11 (BS) Clock Input Clock Enable Chip Select Row Address Strobe Column Address Strobe Write Enable Address Inputs Bank Select DQ DQM, LDQM, UDQM Data Input /Output Data Mask Power (+ 3.3 V) Ground Power for DQ’s (+ 3.3 V) Ground for DQ’s Not connected VDD

• Bit Synchronous DRAM Operation Definition All of SDRAM operations are defined by states of control signals CS, RAS,.