DRAM Module (access time 60 ns) DRAM Module (access time 70 ns) DRAM Module (access time 60 ns) DRAM Module (access time 70 ns)
Semiconductor Group
571
09.94
HYM 324020S/GS-60/-70 4M x 32-Bit
The HYM 324020S/GS-60/-70 is a 16 M Byte DRAM module organized as 4 194 304 words by 32-bit in a 72-pin
Full PDF Text Transcription for HYM324020S (Reference)
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HYM324020S. For precise diagrams, and layout, please refer to the original PDF.
4M x 32-Bit Dynamic RAM Module HYM 324020S/GS-60/-70 Preliminary Information • 4 194 304 words by 32-bit organization (alternative 8 388 608 words by 16-bit) Fast access ...
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-bit organization (alternative 8 388 608 words by 16-bit) Fast access and cycle time 60 ns access time 110 ns cycle time (-60 version) 70 ns access time 130 ns cycle time (-70 version) Fast page mode capability 40 ns cycle time (-60 version) 45 ns cycle time (-70 version) Single + 5 V (± 10 %) supply Low power dissipation max. 4840 mW active (HYM 324020S/GS-60) max. 4400 mW active (HYM 324020S/GS-70) CMOS – 44 mW standby TTL – 88 mW standby • • CAS-before-RAS refresh RAS-only-refresh Hidden-refresh 8 decoupling capacitors mounted on substrate All inputs, outputs and clocks fully TTL compatible 72 pin Single in-Line Memory
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