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ICs for Consumer Electronics
Field Mixer SDA 9270
Data Sheet 01.96
SDA 9270 Revision History: Previous Version: Page 24 25 25 25 27
Current Version: 01.96
Subjects (changes since last revision) HYTHL1 control bits have been increased to 6 HYTHL2 control bits have been increased to 6 HYTHH1 control bits have been increased to 6 HYTHH2 control bits have been increased to 6 Clock inputs CLL, SCA, SCAD: SCA clock frequence MIN changed to 12 MHz SCAD clock specification added Fall/rise time specification added I2C-Bus specification extended to fast mode Max. average supply current: 200 mA
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Edition 01.96 This edition was realized using the software system FrameMaker®. Published by Siemens AG, Bereich Halbleiter, MarketingKommunikation, Balanstraße 73, 81541 München © Siemens AG 1996.